DocumentCode
2840691
Title
Hybrid BIST optimization for core-based systems with test pattern broadcasting
Author
Ubar, Raimund ; Jenihhin, Maksim ; Jervan, Gert ; Peng, Zebo
Author_Institution
Dept. of Comput. Eng., Tallinn Tech. Univ., Estonia
fYear
2004
fDate
28-30 Jan. 2004
Firstpage
3
Lastpage
8
Abstract
This paper introduces a technique for hybrid BIST time optimization for testing core-based systems that use test pattern broadcasting for both pseudorandom and deterministic patterns. First we formulate the test time minimization problem for such an architecture. Thereafter we present algorithms for finding an efficient combination of pseudorandom and deterministic test sets under given memory constraints, so that the system testing time can be shortened. We also analyze the significance of the pseudorandom sequence quality for the final results. The results are illustrated and the efficiency of the approach is demonstrated by experimental results.
Keywords
built-in self test; minimisation; random sequences; set theory; system-on-chip; core based systems; deterministic patterns; deterministic test sets; hybrid BIST time optimization; hybrid built-in self test time optimization; memory constraints; pseudorandom patterns; pseudorandom sequence quality; system-on-chip; test pattern broadcasting; test time minimization; Automatic testing; Broadcasting; Built-in self-test; Electronic equipment testing; Embedded computing; Embedded system; Laboratories; Logic testing; Memory management; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Design, Test and Applications, Proceedings. DELTA 2004. Second IEEE International Workshop on
Conference_Location
Perth, WA, Australia
Print_ISBN
0-7695-2081-2
Type
conf
DOI
10.1109/DELTA.2004.10057
Filename
1409808
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