Title :
ANSYS-based 3D-SoC thermal electric coupling model
Author :
Zhihai, Li ; Wenshi, Li
Author_Institution :
Sch. of Electron. & Inf. Eng., Soochow Univ., Suzhou, China
Abstract :
In order to thermal-design 3D-SoC, one novel thermal electric coupling ANSYS model is built with features on (1) unit type of SOLID69, (2) 6-die stack-layers, (3) innerdie Cu-line 1 ~ 3 as interconnect-complex level, (4) die current density converted into voltage across Cu-line, and (5) ITRS-2007 data, for scanning out top-layer temperature decrease factors. Four key room temperature tendency decrease factors were grasped: (a) tc (copper interconnect thick), (b) tp (package thick), (c) tsi1 (die1 thick), and (d) kp (package thermal conductivity).
Keywords :
copper; integrated circuit interconnections; system-on-chip; system-on-package; thermal conductivity; 6-die stack-layers; ITRS-2007 data; SOLID69; copper interconnect thick; die current density; innerdie Cu-line; package thermal conductivity; package thick; thermal design 3D SoC; thermal electric coupling ANSYS model; Educational institutions; 3D-SoC; ANSYS; temperature decrease factors; thermal electric coupling model;
Conference_Titel :
Computer Application and System Modeling (ICCASM), 2010 International Conference on
Conference_Location :
Taiyuan
Print_ISBN :
978-1-4244-7235-2
Electronic_ISBN :
978-1-4244-7237-6
DOI :
10.1109/ICCASM.2010.5620817
