Stresses in 3D SiP with TSV under unsteady thermal loads

Author

Kinoshita, Takahiro ; Kawakami, Takashi ; Wakamatsu, Takeshi ; Matsumoto, Keiji ; Kohara, Sayuri ; Orii, Yasumitsu ; Yamada, Fumiaki ; Kada, Morihiro

Author_Institution

Toyama Prefectural Univ., Toyama, Japan

fYear

2011

fDate

19-21 Oct. 2011

Firstpage

373

Lastpage

376

Abstract

Semiconductor chips with TSV structures were constructed by many materials and each material had individual material properties. In case of above complex structure, the thermal stress was induced by difference of material properties and temperature variation. In addition, bending of semiconductor chips depends on warpage behavior of heat sink and PCB will be a factor of damages of the chips and TSVs. In this study, simulations on unsteady thermal loads were performed with a large scale simulator based on FEM, ADVENTURECluster® and mechanical strength of TSV and brittle Si chip were discussed in order to ensure the reliability of 3D SiP under unsteady state.

Keywords

finite element analysis; heat sinks; integrated circuit interconnections; integrated circuit reliability; printed circuits; system-on-package; thermal stresses; three-dimensional integrated circuits; 3D SiP; ADVENTURECluster®; FEM; PCB; TSV; finite element method; heat sink; mechanical strength; printed circuit boards; semiconductor chips; through-silicon-vias; unsteady thermal loads; warpage behavior; Silicon; Solid modeling; Stress; Thermal loading; Three dimensional displays; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2011 6th International

Conference_Location

Taipei

ISSN

2150-5934

Print_ISBN

978-1-4577-1387-3

Electronic_ISBN

2150-5934

Type

conf

DOI

10.1109/IMPACT.2011.6117169

Filename

6117169