Title :
On using test vector differences for reducing test pin numbers
Author :
Flottes, Marie-Lise ; Poirier, Regis ; Rouzeyre, Bruno
Author_Institution :
Lab. d´Inf., de Robotique et de Microelectron. de Montpellier, France
Abstract :
We propose a method for reducing test data volume on System on Chip (SoC) architecture. This method reduces the required number of Automatic Test Equipment (ATE) output pins compared to the number of scan-in inputs on every core (horizontal compression). Compression and decompression are based on arithmetic operations and operators.
Keywords :
automatic test equipment; data compression; integrated circuit testing; system-on-chip; ATE output pins; SOC architecture; arithmetic operations; arithmetic operators; automatic test equipment; decompression; horizontal compression; system-on-chip; test data volume reduction; test pin numbers reduction; test vector differences; Arithmetic; Automatic test equipment; Circuit faults; Circuit testing; Logic testing; Pins; Robotics and automation; Switches; System testing; System-on-a-chip;
Conference_Titel :
Electronic Design, Test and Applications, Proceedings. DELTA 2004. Second IEEE International Workshop on
Conference_Location :
Perth, WA, Australia
Print_ISBN :
0-7695-2081-2
DOI :
10.1109/DELTA.2004.10018
