Title :
The fastest carry lookahead adder
Author :
Yu-Ting Pai ; Chen, Yu-Kumg
Author_Institution :
Dept. of Electron. Eng., Huafan Univ., Taipei, Taiwan
Abstract :
Adder is a very basic component in a central processing unit. The speed of compute becomes the most considerable condition for a designer. The carry lookahead adder is the highest speed adder nowadays. In this paper, a new method for modifying the carry lookahead adder is proposed. Based on the analysis of gate delay and simulation, the proposed modified carry lookahead adder is faster than the carry lookahead adder.
Keywords :
adders; carry logic; delay circuits; integrated logic circuits; CPU; central processing unit; fastest carry lookahead adder; gate delay; integrated circuits; simulation; Adders; Analytical models; Appraisal; Arithmetic; Central Processing Unit; Circuit simulation; Computational modeling; Costs; Delay effects; Mathematics; adder; carry lookahead adder; central processing unit; gate delay; integrated circuit;
Conference_Titel :
Electronic Design, Test and Applications, Proceedings. DELTA 2004. Second IEEE International Workshop on
Conference_Location :
Perth, WA, Australia
Print_ISBN :
0-7695-2081-2
DOI :
10.1109/DELTA.2004.10071
