Title :
Thermo-mechanical stress analysis and optimization for 28nm extreme low-k large die fcBGA
Author :
Hsieh, Ming-Che ; Lee, Chien Chen ; Hung, Li Chiun ; Wang, Vincent ; Perng, Harry
Author_Institution :
STATS ChipPAC Taiwan Co., Ltd., Hsinchu, Taiwan
Abstract :
The pre-solder crack phenomenon after thermal cycling test is observed in 28nm extreme low-k (ELK) large die fcBGA (flip chip ball grid array), which may come from the resulted critical stresses in IMC (intermetallic compounds) on Cu pad layer. For the purpose of realizing the thermal-mechanical stress distributions in 28nm ELK large die fcBGA, a comprehensive study for the effects of package geometry is investigated by using three-dimensional finite element analyses (FEA) in this paper. The effects of under bump metallurgy (UBM) size, solder resistant opening (SRO) size, solder bump dimension, thermal interface material (TIM) thickness, Cu pad diameter, substrate thickness and its coefficient of thermal expansion (CTE) are discussed by Taguchi L16(27) methodology to figure out the most significant factors. Through the statistical results, it is found that the factors of UBM size, SRO size and Cu pad diameter had significant contributions to stress responses. The most important parameters of UBM and SRO size ratio (UBM/SRO) as well as Cu pad diameter and SRO size ratio (pad/SRO) that comprehend the corresponding stress responses are captured by using response surface methodology (RSM). To have further discussions of these significant factors, dissections for UBM, SRO and polyimide (PI) opening size are also illustrated. The simulated results can be good references and effectively served as design guidelines to avoid the critical stresses as well as enhance the reliability in 28nm ELK large die fcBGA.
Keywords :
Taguchi methods; ball grid arrays; cracks; finite element analysis; flip-chip devices; optimisation; response surface methodology; solders; stress analysis; Cu pad diameter; Cu pad layer; Taguchi L16(27) methodology; extreme low-k large die fcBGA; flip chip ball grid array; intermetallic compounds; optimization; package geometry; pre-solder crack phenomenon; response surface methodology; size 28 nm; solder bump dimension; solder resistant opening size; substrate thickness; thermal cycling test; thermal expansion; thermal interface material thickness; thermal-mechanical stress distribution; thermo-mechanical stress analysis; three-dimensional finite element analysis; under bump metallurgy size; Copper; Flip chip; Packaging; Reliability; Stress; Substrates; Thermal stresses;
Conference_Titel :
Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2011 6th International
Conference_Location :
Taipei
Print_ISBN :
978-1-4577-1387-3
Electronic_ISBN :
2150-5934
DOI :
10.1109/IMPACT.2011.6117217