A Partially Buffered Crossbar packet switching architecture and its scheduling

The crossbar fabric is widely used as the interconnect of high-performance packet switches due to its low cost and scalability. There are two main variants of the crossbar fabric: unbuffered and internally buffered. On one hand, unbuffered crossbar fabric switches exhibit the advantage of using no internal buffers. However, they require a centralized and complex scheduler. Internally buffered crossbar fabric switches, on the other hand, overcome the scheduling complexity by means of distributed schedulers. However, they require expensive internal buffers-one per crosspoint. In this paper we propose a novel architecture, namely the Partially Buffered Crossbar (PBC) switching architecture, where a small number of separate internal buffers are maintained per output. Our goal is to design a PBC switch having the performance of buffered crossbars and a cost comparable to that of unbuffered crossbars. We propose a class of round-robin scheduling algorithms for the PBC switch. Simulations results show that using as few as 8 buffers per output port and irrespective of the number,N, of input ports of the switch, we can achieve even better performance than buffered crossbars that use N buffers per output port.