DocumentCode
2843272
Title
Power supply noise-aware 3D floorplanning for system-on-package
Author
Wong, Eric ; Minz, Jacob ; Lim, Sung Kyu
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2005
fDate
24-26 Oct. 2005
Firstpage
259
Lastpage
262
Abstract
We develop the first power supply noise-aware floorplanning for 3D system-on-package. Our 3D floorplanner aims at reducing the amount of decoupling capacitance (decap) needed to suppress the simultaneous switching noise. We perform footprint-aware decap insertion to minimize the area overhead of the 3D structure. Our effective decap distance concept allows functional blocks to access decaps in other layers.
Keywords
integrated circuit layout; integrated circuit noise; system-in-package; 3D floorplanning; 3D structure; 3D system-on-package; decoupling capacitance; footprint-aware decap insertion; power supply noise-aware floorplanning; simultaneous switching noise; Capacitance; Circuit noise; Costs; Coupling circuits; Packaging; Power generation; Power supplies; Resonance; Temperature; White spaces;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2005. IEEE 14th Topical Meeting on
Print_ISBN
0-7803-9220-5
Type
conf
DOI
10.1109/EPEP.2005.1563753
Filename
1563753
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