Title :
"RESISTIVE SHORTS" WITHIN CMOS GATES
Author :
Hao, Hong ; McCluskey, Edward J.
Keywords :
CMOS logic circuits; Circuit faults; Circuit testing; Degradation; Electrical resistance measurement; Logic circuits; Logic gates; Propagation delay; Semiconductor device modeling; Voltage;
Conference_Titel :
Test Conference, 1991, Proceedings., International
Print_ISBN :
0-8186-9156-5
DOI :
10.1109/TEST.1991.519521