Title :
Efficient sorting algorithms for the cell broadband engine
Author :
Sharma, Dolly ; Thapar, Vishal ; Ammar, Reda A. ; Rajasekaran, Sanguthevar ; Ahmed, Mohamed
Author_Institution :
Dept. of Comput. Sci. & Eng., Connecticut Univ., Storrs, CT
Abstract :
The problem of sorting has been studied extensively and many algorithms have been suggested in the literature for the problem. Literature on parallel sorting is abundant. Many of the algorithms proposed, though being theoretically important, may not perform satisfactorily in practice owing to large constants in their time bounds. The algorithms presented in this paper have the potential of being practical. We suggest some novel sorting mechanisms specific to the cell broadband engine. We try to utilize the specifics of its architecture in order to get the optimum performance. As part of our comparative analysis we juxtapose these algorithms with similar ones implemented on Itanium 2 processor as well as the Pentium 4 processor.
Keywords :
cache storage; microprocessor chips; parallel architectures; sorting; architecture specifics; cache management; cell broadband engine; memory request; optimum performance; parallel sorting; sorting algorithm; Algorithm design and analysis; Application software; Computer architecture; Computer science; Delay; Engines; Multicore processing; Processor scheduling; Programming profession; Sorting;
Conference_Titel :
Computers and Communications, 2008. ISCC 2008. IEEE Symposium on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-2702-4
Electronic_ISBN :
1530-1346
DOI :
10.1109/ISCC.2008.4625708