DocumentCode :
2844096
Title :
Integrating the verification of timing, performance and correctness properties of concurrent systems
Author :
Cerone, A. ; Kearney, D.A. ; Milne, G.J.
Author_Institution :
Adv. Comput. Res. Centre, Univ. of South Australia, Adelaide, SA, Australia
fYear :
1998
fDate :
23-26 Mar 1998
Firstpage :
109
Lastpage :
119
Abstract :
Previous methods of verification tend to keep correctness, timing and performance separate. We present a process algebra based methodology for the integrated modelling and verification of correctness, performance and timing properties of concurrent systems. We have applied the method to the domain of asynchronous hardware and used an asynchronous micropipeline as an illustrative example
Keywords :
formal verification; parallel processing; performance evaluation; pipeline processing; process algebra; timing; asynchronous hardware; asynchronous micropipeline; concurrent systems; correctness verification; methodology; modelling; performance verification; process algebra; timing verification; Algebra; Concurrent computing; Delay; Hardware; Performance analysis; Petri nets; Software safety; Software systems; Stochastic processes; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application of Concurrency to System Design, 1998. Proceedings., 1998 International Conference on
Conference_Location :
Fukushima
Print_ISBN :
0-8186-8350-3
Type :
conf
DOI :
10.1109/CSD.1998.657544
Filename :
657544
Link To Document :
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