DocumentCode

2846423

Title

Total design of high-speed counters: Process to subsystem

Author

Foss, R. ; Brothers, J.

Author_Institution

The Plessey Co., Ltd., Northants, England

Volume

XI

fYear

1968

fDate

14-16 Feb. 1968

Firstpage

44

Lastpage

45

Keywords

Assembly; Circuit synthesis; Clocks; Cost function; Counting circuits; Design optimization; Logic circuits; Logic design; Resistors; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference. Digest of Technical Papers. 1968 IEEE International

Conference_Location

Philadelphia, PA, USA

Type

conf

DOI

10.1109/ISSCC.1968.1154626

Filename

1154626