DocumentCode :
2846543
Title :
A 112 dB sigma-delta converter with a mixed continuous-time/sampled-data architecture
Author :
Quiquerez, L. ; Kaiser, Alexander ; Billet, D.
Author_Institution :
CNRS, Lille, France
fYear :
1999
fDate :
1999
Firstpage :
52
Lastpage :
57
Abstract :
This paper describes a semi-integrated analog to digital sigma-delta modulator. The very sensitive loop filter front-end is external, but the main part of the converter is integrated in an ASIC. Off-chip, a few high performance operational amplifiers with some passive components are required. Due to design constrains, the loop filter is mixed continuous and discrete time. The design procedure of such modulators is based on a discrete-time prototype
Keywords :
CMOS integrated circuits; continuous time filters; discrete time filters; mixed analogue-digital integrated circuits; sigma-delta modulation; 0.8 micron; ADC; CMOS ASIC; design procedure; discrete-time prototype; loop filter front-end; mixed continuous-time/sampled-data architecture; semi-integrated convertor; sigma-delta converter; Application specific integrated circuits; Clocks; Computer languages; Delta-sigma modulation; Feedback; Filtering; Filters; Frequency; Prototypes; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on
Conference_Location :
Tucson, AZ
Print_ISBN :
0-7803-5510-5
Type :
conf
DOI :
10.1109/SSMSD.1999.768590
Filename :
768590
Link To Document :
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