DocumentCode
2846652
Title
On-chip deterministic counter-based TPG with low heat dissipation
Author
Kavousianos, X. ; Nikolos, D. ; Tragoudas, S.
Author_Institution
Dept. of Comput. Eng. & Inf., Patras Univ., Greece
fYear
1999
fDate
1999
Firstpage
87
Lastpage
92
Abstract
An on-chip test pattern generation (TPG) scheme for the digital components of a mixed signal system is presented. The TPG is a counter. We propose CAD tools that automate its design so that the heat dissipation during test application is low. Experimental results on the ISCAS´85 benchmarks show the impact of the proposed methods
Keywords
automatic test pattern generation; counting circuits; integrated circuit testing; mixed analogue-digital integrated circuits; ATPG; CAD; design automation; digital component; heat dissipation; mixed signal system; on-chip deterministic counter; test pattern generator; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Counting circuits; Fault detection; Hardware; Switching circuits; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on
Conference_Location
Tucson, AZ
Print_ISBN
0-7803-5510-5
Type
conf
DOI
10.1109/SSMSD.1999.768597
Filename
768597
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