A simulation program emphasized on DC analysis of VLSI circuits: SAMOC

Author

Jan, Ying-Wei ; Starzyk, Janusz A.

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Ohio Univ., Athens, OH, USA

fYear

1999

fDate

1999

Firstpage

174

Lastpage

179

Abstract

This paper presents a simulation technique and a computer program for fast DC analysis of MOS transistor based VLSI circuits. Time domain analysis of a VLSI circuit is evaluated by a piecewise constant waveform approximation. This approximation is realized by repeatedly applying the developed DC analysis engine with initial conditions. All proposed methods such as device modeling, circuit partitioning and event-driven simulation were implemented and combined with such well known algorithms as modified nodal analysis (MNA), Katzenelson algorithm and Gaussian elimination in the form of a circuit simulation program: SAMOC. Time domain waveforms and benchmark circuit simulation results comparison of SPICE and SAMOC are presented

Keywords

MOS integrated circuits; VLSI; circuit simulation; integrated circuit modelling; piecewise constant techniques; switched capacitor networks; time-domain analysis; DC analysis; Gaussian elimination; Katzenelson algorithm; MOS transistor; SAMOC; VLSI circuit; circuit partitioning; computer program; device modeling; event-driven simulation; modified nodal analysis; piecewise constant waveform approximation; simulation; time domain analysis; Analytical models; Circuit analysis; Circuit analysis computing; Circuit simulation; Computational modeling; Computer simulation; MOSFETs; Partitioning algorithms; Time domain analysis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on

Conference_Location

Tucson, AZ

Print_ISBN

0-7803-5510-5

Type

conf

DOI

10.1109/SSMSD.1999.768613

Filename

768613