DocumentCode :
2847552
Title :
A 64-bit planar double-diffused monolithic memory chip
Author :
Agusta, B.
Author_Institution :
IBM Corp., Essex Junction, VT, USA
Volume :
XII
fYear :
1969
fDate :
19-21 Feb. 1969
Firstpage :
38
Lastpage :
39
Abstract :
A 40-ns access bipolar monolithic memory of 2021 words × 144 bits capacity has been developed and incorporated in a computing system. The design and structure of a 64-bit silicon chip will be presented and some aspects of the organization and circuit design discussed.
Keywords :
Cost function; Delay; High speed optical techniques; Integrated circuit interconnections; Integrated circuit technology; Integrated optics; Light emitting diodes; Read-write memory; Resistors; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1969 IEEE Internationa
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1969.1154699
Filename :
1154699
Link To Document :
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