• DocumentCode
    2848247
  • Title

    A Self-Calibrated Multiphase DLL-Based Clock Generator

  • Author

    Chen, Hsin-Shu ; Hung, Chao-Ching

  • Author_Institution
    Nat. Taiwan Univ., Taipei
  • fYear
    2007
  • fDate
    25-27 April 2007
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A delay-locked loop (DLL) Integrated with an analog self-calibration circuit is presented. The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buffers. The experimental circuit in a standard 0.35-mum CMOS process demonstrates delay mismatch between phases can be reduced from tens of pico-second to less than ten pico-seconds at 100 MHz. The prototype circuit occupies an area of 2.1 mm2, and consumes around 10.1 mW at 3.3 V.
  • Keywords
    CMOS integrated circuits; calibration; clocks; delay lock loops; CMOS process; analog self-calibration circuit; delay mismatch; delay-locked loop based clock generator; frequency 100 MHz; power 10.1 mW; self-calibrated multiphase DLL; size 0.35 mum; voltage 3.3 V; Calibration; Clocks; Delay effects; Delay lines; Feedback circuits; Phase detection; Phase frequency detector; Quantization; Temperature; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on
  • Conference_Location
    Hsinchu
  • Print_ISBN
    1-4244-0583-1
  • Electronic_ISBN
    1-4244-0583-1
  • Type

    conf

  • DOI
    10.1109/VDAT.2007.373237
  • Filename
    4239429