DocumentCode :
2848457
Title :
Input Selection Encoding for Low Power Multiplexer Tree
Author :
Chang, Hsiao-En ; Huang, Juinn-Dar ; Chen, Chia-I
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
fYear :
2007
fDate :
25-27 April 2007
Firstpage :
1
Lastpage :
4
Abstract :
With the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (MUX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of´2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.
Keywords :
VLSI; multiplexing equipment; tree codes; VLSI design; heuristic algorithm; input selection encoding; low power multiplexer tree; Circuits; Encoding; Energy consumption; Hardware design languages; Heuristic algorithms; Multiplexing; Portable computers; Power dissipation; Signal design; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
1-4244-0583-1
Electronic_ISBN :
1-4244-0583-1
Type :
conf
DOI :
10.1109/VDAT.2007.373253
Filename :
4239445
Link To Document :
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