DocumentCode
2848739
Title
A 14-bit 200-MS/s time-interleaved ADC calibrated with LMS-FIR and interpolation filter
Author
Ye, Fan ; Zhang, Peng ; Yu, Bei ; Chen, Chixiao ; Zhu, Yu ; Ren, Junyan
Author_Institution
State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China
fYear
2011
fDate
17-18 Nov. 2011
Firstpage
1
Lastpage
4
Abstract
A digital background calibration for time-interleaved ADC is presented. By using LMS-FIR and interpolation filter, mismatches of offset, gain, bandwidth, and sample-time error are calibrated. Adaptively controlled by correlation evaluation, the calibration is applicable for most input cases. A 14-bit 200-MS/s two-channel time-interleaved ADC is prototyped in a 0.18-µm CMOS process with core area of 15.2 mm2. The ADC achieves an SFDR of 88.9 dBc and an SNDR of 69.5 dBc after calibration, consuming 460 mW at 1.8 V.
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of
Conference_Location
Tianjin, China
ISSN
Pending
Print_ISBN
978-1-4577-1998-1
Electronic_ISBN
Pending
Type
conf
DOI
10.1109/EDSSC.2011.6117569
Filename
6117569
Link To Document