Transitive closure on an instruction systolic array

The instruction systolic array (ISA) is an array processor architecture that is characterized by a systolic flow of instructions (instead of data as in standard systolic arrays). It is shown how the well-known Warshall algorithm for computing the transitive closure of a directed graph can be implemented on an n×n ISA. For problem sizes m⩽n the time complexity of this implementation is O(m)