DocumentCode
2849027
Title
Managing Bias-Temperature Instability for Product Reliability
Author
Lee, Yung-Huei ; McMahon, William ; Mielke, Neal ; Lu, Yin-Lung Ryan ; Walstra, Steve
Author_Institution
Intel Corp., Santa Clara
fYear
2007
fDate
23-25 April 2007
Firstpage
1
Lastpage
2
Abstract
A NBTI model has been generated which takes into consideration AC recovery. This model can be used to improve the connection between the DC stress measurements of a discrete device and AC product usage in a real device. The model can be incorporated into circuit aging simulations to check the NBTI degradation for a simple circuit. For complicated circuitry such as CPU, NBTI degradation should be managed through process optimization, circuit timing design, and product test guardband to ensure that products meet customer spec and lifetime usage.
Keywords
integrated circuit design; integrated circuit modelling; integrated circuit reliability; microprocessor chips; semiconductor device reliability; thermal stability; AC recovery; CPU; DC stress measurements; NBTI degradation; PMOST degradation; circuit aging simulation; circuit timing design; negative bias-temperature instability; process optimization; product reliability; product test guardband; AC generators; Aging; Circuit simulation; Circuit testing; Degradation; Design optimization; Niobium compounds; Stress measurement; Timing; Titanium compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Applications, 2007. VLSI-TSA 2007. International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
1-4244-0584-X
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2007.378916
Filename
4239484
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