• DocumentCode
    2849195
  • Title

    An integrated circuit layout design program based on a graph-theoretical approach

  • Author

    Sugiyama, N. ; Nemoto, Shunsuke ; Kani, K. ; Ohtsuki, Tomoaki ; Watanabe, Hiromi

  • Author_Institution
    Nippon Electric Co., Ltd., Tokyo, Japan
  • Volume
    XIII
  • fYear
    1970
  • fDate
    18-20 Feb. 1970
  • Firstpage
    86
  • Lastpage
    87
  • Abstract
    A graph-theoretical method, with wiring and placement problems considered simultaneously, will be discussed. The approach has resulted in the development of a computer program affording automatic layout design of single-layer IC chips on smallest possible areas.
  • Keywords
    Application software; Bonding; Bridge circuits; Circuit theory; Graph theory; Integrated circuit layout; Resistors; Silicon; Testing; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1970 IEEE International
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1970.1154803
  • Filename
    1154803
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2849195