A Strained N-channel Impact-ionization MOS (I-MOS) Transistor with Elevated Silicon-Carbon Source/Drain for Performance Enhancement

This paper reports the first demonstration of strain engineering in impact-ionization MOS (I-MOS) transistors for performance enhancement. An epitaxial silicon-carbon (Si_0.99C_0.01) source/drain was integrated in a CMOS-compatible I-MOS fabrication process. The lattice mismatch between Si_0.99C_0.01 and Si was exploited for the realization of strained I-MOS devices. Uniaxial tensile strain in the channel and impact-ionization regions contributes to enhanced electron transport and device characteristics. The strained I-MOS technology demonstrates an excellent subthreshold swing of 5.3 mV/decade at room temperature for devices with 100 nm gate length. Compared to control I-MOS devices with Si raised source/drain, strained I-MOS devices show significantly higher drive currents and a steeper subthreshold swing.