• DocumentCode
    2849386
  • Title

    Unipolar CMOS inverter based on punch-through effect with two embedded oxide structure

  • Author

    Lin, Chia-Hsien ; Lin, Jyi-Tsong ; Chen, Hsuan-Hsu ; Eng, Yi-Chuen ; Wang, Shih-Wei

  • Author_Institution
    Dept. of EE, Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
  • fYear
    2011
  • fDate
    17-18 Nov. 2011
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    This paper presents a novel NMOS structure called two-embedded oxide (2EO) to replace the conventional PMOS transistor in a CMOS inverter. According to TCAD simulations, the 2EO is used to control the punch-through current to achieve the desired characteristics for a CMOS inverter. More importantly, compared with the conventional CMOS layout, due to the presence of two NMOS transistors to share the output contact, a reduction in mask-layout area (improved 59%) is observed. Compared with the EO, our proposed 2EO can reduce the static power consumption by 33%, for achieving a requirement of reduced static power consumption in a non-conventional CMOS.
  • Keywords
    CMOS integrated circuits; MOSFET; invertors; low-power electronics; 2EO structure; NMOS transistors; TCAD simulations; mask-layout area; punch-through current; static power consumption; two-embedded oxide structure; unipolar CMOS inverter; CMOS integrated circuits; Inverters; Layout; Logic gates; Power demand; Transistors; Two-embedded oxide (2EO); punch-through current; static power consumption; unipolar CMOS;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of
  • Conference_Location
    Tianjin
  • ISSN
    Pending
  • Print_ISBN
    978-1-4577-1998-1
  • Electronic_ISBN
    Pending
  • Type

    conf

  • DOI
    10.1109/EDSSC.2011.6117607
  • Filename
    6117607