DocumentCode
2849388
Title
A new inner-product processor for FIR filter implementation
Author
Abdel-Raheem, E. ; Tawfik, A. ; Fahmi, M. ; El-Guibaly, F.
Author_Institution
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
fYear
1995
fDate
17-19 May 1995
Firstpage
395
Lastpage
398
Abstract
A new fixed-point inner-product processor is presented to be used in an FIR array processor implementation. The processor enhances the speed of operation with a slight increase in area. Moreover, the new processor would improve the noise performance of the system since a double-precision word is assigned for the output without incurring extra communication overhead
Keywords
FIR filters; digital arithmetic; filtering theory; parallel processing; FIR filter implementation; double-precision word; fixed-point inner-product processor; noise performance; operation speed; Added delay; Clocks; Feedback; Finite impulse response filter; Hardware; Log periodic antennas; Processor scheduling; Round robin; Sampling methods; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers, and Signal Processing, 1995. Proceedings., IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
0-7803-2553-2
Type
conf
DOI
10.1109/PACRIM.1995.519552
Filename
519552
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