An analog-digital CMOS semicustom array for high-performance mixed-mode ASICs

Author

Shlemin, D.L.

Author_Institution

Siberian State Univ. of Telecommun. & Inf. Sci., Novosibirsk, Russia

fYear

1998

fDate

1998

Firstpage

135

Lastpage

142

Abstract

A standard-digital-CMOS-process-compatible analog-digital CMOS semicustom array architecture is presented. The array is suitable for high-performance SC circuit design, though, other circuit techniques such as SI and continuous-time analog signal processing are possible. Main cells of an analog standard cells library are presented as well as experimental results of testing some SC systems such as the 5-th order elliptic SC low-pass filter and the 10-bit DAC are discussed

Keywords

CMOS integrated circuits; cellular arrays; digital-analogue conversion; mixed analogue-digital integrated circuits; switched capacitor filters; 10 bit; DAC; SC macros; analog standard cells library; analog-digital CMOS semicustom array; cascode op amp; digital-CMOS-process-compatible; fifth order elliptic SC low-pass filter; high-performance SC circuit design; high-performance mixed-mode ASICs; Analog-digital conversion; Application specific integrated circuits; CMOS process; Circuit synthesis; MOS capacitors; MOSFETs; Plasma applications; Plasma devices; Sensor arrays; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Instrument Engineering Proceedings, 1998. APEIE-98. Volume 1. 4th International Conference on Actual Problems of

Conference_Location

Novosibirsk

Print_ISBN

0-7803-4938-5

Type

conf

DOI

10.1109/APEIE.1998.768931

Filename

768931