DocumentCode
2849679
Title
Integrated MOS and bipolar analog delay lines using bucket-brigade capacitor storage
Author
Sangster, F.
Author_Institution
Philips Research Laboratories, Eindhoven, The Netherlands
Volume
XIII
fYear
1970
fDate
18-20 Feb. 1970
Firstpage
74
Lastpage
75
Abstract
An electronic variable delay line in IC form for analog data processing will be described. Basis is a chain of storage capacitors and charge-transfer circuits, acting as an analog shift-register with externally variable shift rate.
Keywords
Bandwidth; Clocks; Delay lines; Frequency; Laboratories; MOS capacitors; Sampling methods; Shift registers; Switched capacitor circuits; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1970 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1970.1154839
Filename
1154839
Link To Document