Title :
Performance test of dual-core processor system based on NIOS II
Author :
Xu, Meihua ; Yao, Huacheng ; Huan, Xuan
Author_Institution :
Sch. of Mechatron. Eng. & Autom., Shanghai Univ., Shanghai, China
Abstract :
This paper presents the performance test results of the dual-core processor system based on NIOS II, and proved its advantage in calculating speed. Building a single-core processor system and a dual-core processor system in NIOS II, the BBP algorithm is used to calculate Pi in these two systems, and then the calculating time is obtained in the FIFO communication. By comparing the processing speed with different means of communication, we find that the performance advantage of dual-core processor system will increase along with the computational complexity. When the calculating digit is up to 64-bit or more, the processing time will be saved about 50% in the dual-core processor system.
Keywords :
computational complexity; microprocessor chips; multiprocessing systems; performance evaluation; FIFO communication; NIOS II; Pi calculation; dual-core processor system; single-core processor system; Clocks; Computational modeling; Educational institutions; SDRAM; USA Councils; BBP; FIFO; NIOS II; dual-core; processing time; single-core;
Conference_Titel :
Electrical & Electronics Engineering (EEESYM), 2012 IEEE Symposium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4673-2363-5
DOI :
10.1109/EEESym.2012.6258593
