Title :
A 14-bit 200-MS/s time-interleaved ADC calibrated with LMS-FIR and interpolation filter
Author :
Ye, Fan ; Zhang, Peng ; Yu, Bei ; Chen, Chixiao ; Zhu, Yu ; Ren, Junyan
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
A digital background calibration for time-interleaved ADC is presented. By using LMS-FIR and interpolation filter, mismatches of offset, gain, bandwidth, and sample-time error are calibrated. Adaptively controlled by correlation evaluation, the calibration is applicable for most input cases. A 14-bit 200-MS/s two-channel time-interleaved ADC is prototyped in a 0.18-μm CMOS process with core area of 15.2 mm2. The ADC achieves an SFDR of 88.9 dBc and an SNDR of 69.5 dBc after calibration, consuming 460 mW at 1.8 V.
Keywords :
CMOS digital integrated circuits; FIR filters; analogue-digital conversion; calibration; interpolation; least mean squares methods; CMOS process; LMS- FIR; SFDR; bit rate 200 Mbit/s; correlation evaluation; digital background calibration; interpolation filter; least mean square method; power 460 mW; sample-time error; size 0.18 mum; two-channel time-interleaved ADC; voltage 1.8 V; word length 14 bit; Calibration; Correlation; Delay; Finite impulse response filter; Interpolation; Least squares approximation; Wideband;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of
Conference_Location :
Tianjin
Print_ISBN :
978-1-4577-1998-1
Electronic_ISBN :
Pending
DOI :
10.1109/EDSSC.2011.6117646
