Design of configurable LFSR instructions targeted at stream cipher processing

Author

Nan, Longmei ; Dai, Zibin ; Yang, Xuan

Author_Institution

Zhengzhou Inst. of Inf. Technol., Zhengzhou, China

fYear

2011

fDate

17-18 Nov. 2011

Firstpage

1

Lastpage

2

Abstract

By analyzing the operation characteristic of LFSRs in many public stream cipher algorithms and its bottleneck realized by general processor, several configurable specific instructions are proposed in this paper, which can neatly execute LFSR computing operation in parallel with high performance. The LFSR instructions brought out can sustain different operation data widths, different operating model. Instruction level parallelism based on VLIW system structure and instruction inner parallelism by operating several steps at one time are exploited too. The configurable instructions can be used as an important accelerated way in special processing for stream cipher.

Keywords

cryptography; LFSR computing operation; VLIW system structure; configurable LFSR instructions; configurable specific instructions; general processor; instruction inner parallelism; instruction level parallelism; operating model; operation data widths; stream cipher processing; Acceleration; Algorithm design and analysis; Application specific integrated circuits; Data models; Prototypes; Registers; VLIW; Configurable; Instruction Level Parallel; LFSR; VLIW;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of

Conference_Location

Tianjin

ISSN

Pending

Print_ISBN

978-1-4577-1998-1

Electronic_ISBN

Pending

Type

conf

DOI

10.1109/EDSSC.2011.6117647

Filename

6117647