• DocumentCode
    2850541
  • Title

    Study on boundary scan interconnect test of PCB based on genetic algorithm

  • Author

    Yuling, Shang ; Xuelong, Yan

  • Author_Institution
    CAD Inst., Xidian Univ., Xi´´an, China
  • fYear
    2005
  • fDate
    30 Aug.-2 Sept. 2005
  • Firstpage
    348
  • Lastpage
    350
  • Abstract
    Test generation is one key technologies of boundary scan. Test set affects test efficiency and results directly. Genetic algorithm (GA) is inducted to boundary scan test in field of DFT (design for testability) in this paper. PCB (printed circuit board) and MCM (multichip module) are taken as project objects to explore an algorithm of GA interconnect test generation. Based on the characteristic of interconnect, the fitness function and genetic operators are put forward. Through the imitation and test in practice for DEMO board developed by us, that shows the algorithm is superior to other algorithms to some extent.
  • Keywords
    boundary scan testing; design for testability; genetic algorithms; interconnections; printed circuit testing; boundary scan interconnect test; design for testability; fitness function; genetic algorithm; genetic operators; interconnect test generation; multichip module; printed circuit board; Algorithm design and analysis; Biological cells; Circuit testing; Design for testability; Electronic equipment testing; Genetic algorithms; Genetic engineering; Integrated circuit interconnections; Printed circuits; System testing; boundary-scan; genetic algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Packaging Technology, 2005 6th International Conference on
  • Print_ISBN
    0-7803-9449-6
  • Type

    conf

  • DOI
    10.1109/ICEPT.2005.1564740
  • Filename
    1564740