Title :
A new current-mode circuitry and process for fast logic and memory applications
Author_Institution :
N. V. Philipa, Nijmegen, Netherlands
Abstract :
Design of a current-mode logic gate has been found to afford both high noise immunity operation and interfacing with highly integrated CML circuits. A new process, particularly suitable for high-order integration and low level CML, will be described.
Keywords :
Circuit noise; Epitaxial growth; Epitaxial layers; Geometry; Logic arrays; Logic circuits; Noise figure; Resistors; Substrates; Switches;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1971 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1971.1154904
