A low flicker noise and high IIP2 downconversion mixer for Zero-IF GSM receiver

Author

Jiang, P.C. ; Yan, T.T. ; Jin, J. ; Zhou, J.J.

Author_Institution

Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong Univ., Shanghai, China

fYear

2011

fDate

17-18 Nov. 2011

Firstpage

1

Lastpage

2

Abstract

This paper proposes the design of a low flicker noise and high input-referred IP2 (IIP2) down-conversion mixer for Zero-IF GSM receiver in 0.18um CMOS process. The current driven passive mixer topology is adopted due to its low flicker noise and high linearity instincts. Simulation results show that this mixer achieves a conversion gain of 23.1dB with 940MHz local oscillator input signal, a flicker noise corner frequency of 2.5KHz and out of band IIP2 above 70dBm at the total current of 17mA.

Keywords

CMOS integrated circuits; amplification; cellular radio; flicker noise; mixers (circuits); radio receivers; CMOS process; Zero-IF GSM receiver; conversion gain; current 17 mA; current driven passive mixer topology; frequency 2.5 kHz; frequency 940 MHz; high IIP2 downconversion mixer; high input-referred IP2 down-conversion mixer; high linearity instincts; local oscillator input signal; low flicker noise design; 1f noise; GSM; Mixers; Radio frequency; Receivers; Switches; GSM; IIP2; Zero-IF receiver; flicker noise; passive mixer;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of

Conference_Location

Tianjin

ISSN

Pending

Print_ISBN

978-1-4577-1998-1

Electronic_ISBN

Pending

Type

conf

DOI

10.1109/EDSSC.2011.6117696

Filename

6117696