• DocumentCode
    2851165
  • Title

    Assessing model adequacy in integrated-curcuit simulation

  • Author

    Lindholm, F. ; Director, S.

  • Author_Institution
    University of Florida, Gainesville, Florida, USA
  • Volume
    XIV
  • fYear
    1971
  • fDate
    17-19 Feb. 1971
  • Firstpage
    44
  • Lastpage
    45
  • Abstract
    A method for assessing the adequacy of transistor models in integrated-circuit simulation programs will be offered. For each transistor in a circuit the method yields the model of least complexity consistent with required accuracy.
  • Keywords
    Automatic testing; Bipolar transistors; Breakdown voltage; Circuit analysis computing; Circuit simulation; Circuit testing; Computational modeling; Computerized monitoring; Laboratories; Solid state circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1971 IEEE International
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1971.1154924
  • Filename
    1154924
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2851165