DocumentCode
2851430
Title
A switched collector impedance memory
Author
Tanniguchi, K. ; Hotta, Abhilash ; Imaizumi, I. ; Suzuki, M. ; Nitta, Tom ; Uehara, Kazuhiro ; Oya, Yuichiro
Author_Institution
Hitachi Central Research Laboratory, Tokyo, Japan
Volume
XIV
fYear
1971
fDate
17-19 Feb. 1971
Firstpage
14
Lastpage
15
Abstract
This paper will discuss a 288-bit LSI in which integrated bipolar memory cells exhibited 4-ns access time at 50-200 μW/bit cell standby dissipation.
Keywords
Circuits; Epitaxial layers; Impedance; Laboratories; Large scale integration; Operational amplifiers; Power dissipation; Resistors; Semiconductor diodes; Stability;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1971 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1971.1154939
Filename
1154939
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