DocumentCode
2851479
Title
A high-performance N-channel MOS-LSI using depletion-type load elements
Author
Masuhara, T. ; Nagata, M. ; Hashimoto, Noriaki
Author_Institution
Hitachi Central Research Laboratory, Tokyo, Japan
Volume
XIV
fYear
1971
fDate
17-19 Feb. 1971
Firstpage
12
Lastpage
13
Abstract
The application of depletion type MOS-FETs to monolithic MOS-LSI with reduced power delay will be covered, noting that a 2048-bit read-only memory with 300-ns access time and 50 μW/bit power dissipation has been achieved.
Keywords
Electron devices; Electron mobility; Equations; Glass; Insulation; MOSFET circuits; Power supplies; Solid state circuits; Switching circuits; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1971 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1971.1154941
Filename
1154941
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