DocumentCode :
285162
Title :
Circuits for multi-level neuron nonlinearities
Author :
Yuh, Jen-Dong ; Newcomb, Robert W.
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Volume :
2
fYear :
1992
fDate :
7-11 Jun 1992
Firstpage :
27
Abstract :
The authors demonstrate two multilevel neuron nonlinear circuits using BiCMOS and all-MOS technologies, respectively. Simulations for these two circuits using level-two BiCMOS process parameters, in which case these two circuits can be built on the same chip with BiCMOS technology, are reported. A comparison is given of the BiCMOS and the all-MOS circuits. Channel modulation effects are investigated in these simulations, and precision multilevel nonlinear circuits are designed by using cascode current mirrors and cascode current sinks. It is concluded that these circuits can be readily applied to the realization of multilevel neural networks
Keywords :
MOS integrated circuits; neural chips; BiCMOS; cascode current mirrors; cascode current sinks; neuron nonlinear circuits; Associative memory; BiCMOS integrated circuits; Circuit simulation; Educational institutions; Laboratories; Logic; Network synthesis; Neural networks; Neurons; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0559-0
Type :
conf
DOI :
10.1109/IJCNN.1992.226989
Filename :
226989
Link To Document :
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