Title :
A novel flash memory cell and design optimization for high density and low power application
Author :
Wu, Huiwei ; Qin, Shiqiang ; Cai, Yimao ; Tang, Poren ; Zhan, Zhan ; Huang, Qianqian ; Huang, Ru
Author_Institution :
Inst. of Microelectron., Peking Univ., Beijing, China
Abstract :
A novel flash memory cell based on Tunneling Field Effect Transistor (TFET) is investigated via 2-D device simulation in this paper. The proposed flash memory cell shows improved program/erase speed, increased programming efficiency and super punch-through immunity as the cell gate length scaled from 180nm to 45nm, which indicates that this new structure is with strong scalability. Furthermore, cell design consideration i.e. ambipolar suppression for the TFET-based flash cell are also investigated and discussed.
Keywords :
field effect transistors; flash memories; integrated circuit design; 2D device simulation; TFET-based flash cell; ambipolar suppression; cell gate length; design optimization; flash memory cell; high density low power application; programming efficiency; super punch-through immunity; tunneling field effect transistor; FETs; Flash memory cells; Logic gates; Nonvolatile memory; Programming; Tunneling; Flash; TFET (Tunneling Field Effect Transistor); low power; scalability;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of
Conference_Location :
Tianjin
Print_ISBN :
978-1-4577-1998-1
Electronic_ISBN :
Pending
DOI :
10.1109/EDSSC.2011.6117733
