Perspectives of TFETs for low power analog ICs

In this paper we show that tunnel field effect transistors (TFETs) biased in the subthreshold region promise several advantages for low-power/high-frequency analog IC applications (e.g. GHz operation with sub-0.1 mW power consumption). Analytical and TCAD models for graphene nano-ribbon (GNR) and InAs/GaSb nanowire TFETs are employed, respectively, for the first time in subthreshold analog circuit examples using the g_m/I_d integrated circuit (IC) design technique. From comparison of these TFET technologies with traditional FETs it is observed that due to the higher currents per unit gate width at low voltage for TFETs, smaller, higher speed, and lower power analog circuits are enabled.