Title :
[Copyright notice]
Abstract :
The following topics are dealt with: microprocessor test; test quality improvement; memory testing; new SERDES test techniques; SoC test; advanced diagnosis algorithms; ATPG; delay test; advanced characterization methods; HF in volume production; power aware testing; PCBA structural defect detection; efficient defect diagnosis; PLL test; test data reduction; debug data reduction; functional test; outlier test; ATE; DFT; analog testing; test power reduction; fault simulation; fault tolerance; error tolerance; nanotechnology; RF test methods; microprocessor defect tolerance; ADC test; boundary-scan-based system test; reliability; at-speed scan test; design-for-debug infrastructure; car IC testing; wafer probing; and statistical testing.
Keywords :
analogue-digital conversion; automatic test equipment; automatic test pattern generation; automotive electronics; data reduction; delay circuits; discrete Fourier transforms; fault simulation; integrated circuit testing; microprocessor chips; nanotechnology; power aware computing; reliability; statistical testing; storage management; system-on-chip; ADC test; ATE; ATPG; DFT; PCBA structural defect detection; PLL test; RF test method; SERDES test technique; SoC test; advanced characterization method; advanced diagnosis algorithm; analog testing; at-speed scan test; boundary-scan-based system test; car IC testing; debug data reduction; delay test; design-for-debug infrastructure; efficient defect diagnosis; error tolerance; fault simulation; fault tolerance; functional test; memory testing; microprocessor defect tolerance; microprocessor test; nanotechnology; outlier test; power aware testing; reliability; statistical testing; test data reduction; test power reduction; test quality improvement; volume production; wafer probing;
Conference_Titel :
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-1127-6
DOI :
10.1109/TEST.2007.4437548
