Title :
Fully X-tolerant combinational scan compression
Author :
Wohl, P. ; Waicukauski, J.A. ; Ramnath, S.
Author_Institution :
Synopsys Inc., Mountain View, CA
Abstract :
Traditional scan and, more recently, scan compression are increasingly accepted for reducing test cost and improving quality in ever more complex designs. Combinational scan compression techniques are attractive for their low impact on area, timing and design flow, but are best suited for designs with a limited number of unknowns (Xs). However, recent design performance and cost tradeoffs create a much higher density of Xs than previously expected. We present a combinational scan compression method that preserves the low-impact advantages, while also allowing any number and distribution of Xs with virtually no loss of test quality. Results on industrial designs with a varied density of Xs demonstrate consistent data and test time compressions with negligible impact on all design parameters.
Keywords :
automatic test pattern generation; design for testability; integrated circuit testing; ATPG; X-tolerant combinational scan compression; automatic test pattern generation; design for testability; industrial designs; test cost reduction; test quality loss; Automatic test pattern generation; Automatic testing; Circuit testing; Compressors; Costs; Design for testability; Observability; Pins; Silicon; Timing;
Conference_Titel :
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-1127-6
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2007.4437575