DocumentCode
2853239
Title
A low cost test data compression technique for high n-detection fault coverage
Author
Wang, Seongmoon ; Wang, Zhanglei ; Wei, Wenlong ; Chakradhar, Srimat T.
Author_Institution
NEC Labs. America, Princeton, NJ
fYear
2007
fDate
21-26 Oct. 2007
Firstpage
1
Lastpage
10
Abstract
This paper presents a test data compression scheme that combines weighted random pattern testing and LFSR reseeding. Test patterns generated by the proposed decompressor can achieve high n-detection fault coverage. The proposed technique computes weight sets from a set of test cubes that are generated by a traditional 1-detection ATPG tool. The computed weight sets are modified to achieve high n-detection fault coverage. The proposed decompressor can be implemented with low area overhead. Since the proposed technique requires no special ATPG that is customized for the proposed scheme, it can compress test patterns generated by any ATPG tool and generate test patterns from the compressed test data that achieve high n-detection fault coverage. Experimental results show that test patterns generated by the proposed decompressor can achieve very high 5-detection stuck-at fault coverage and high compression for large benchmark circuits.
Keywords
automatic test pattern generation; data compression; logic testing; ATPG; high n-detection fault coverage; low cost test data compression technique; stuck-at faults; weighted random pattern testing; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Costs; Fault detection; National electric code; System testing; Test data compression; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-1127-6
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2007.4437612
Filename
4437612
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