DocumentCode
2853715
Title
Surface-charge RAM system
Author
Engeler, W. ; Tiemann, J. ; Baertsch, R.
Author_Institution
General Electric Co., Schenectady, N.Y., USA
Volume
XV
fYear
1972
fDate
16-18 Feb. 1972
Firstpage
18
Lastpage
19
Abstract
THE APPLICATION of charge-transfer structures to shift registers for analog signal processing and serial memories promises considerable improvement over conventional technologies 1-3. Not only does their topological simplicity permit smaller and faster structures to he built, but the reduction in the number of vias (contacts to the silicon) promises processing advantages as well. This paper will present a storage cell suitable for word organized dynamic random access memory (RAM) which utilizes the benefits of surface-charge devices.
Keywords
Delay; Electrodes; Parasitic capacitance; Random access memory; Read-write memory; Silicon; Voltage; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1972 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1972.1155077
Filename
1155077
Link To Document