DocumentCode
28544
Title
Write Current Self-Configuration Scheme for MRAM Yield Improvement
Author
Ching-Yi Chen ; Sheng-Hung Wang ; Cheng-Wen Wu
Author_Institution
Electr. Eng. Dept., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Volume
21
Issue
7
fYear
2013
fDate
Jul-13
Firstpage
1260
Lastpage
1270
Abstract
Magnetic random access memory (MRAM) is an emerging nonvolatile memory, which is widely studied for its high speed, high density, small cell size, and almost unlimited endurance. However, for deep-submicrometer process technologies, significant variation in the MRAM cells´ operating condition results in write failures in cells and reduces the production yield. Memory designers have to characterize failed MRAM chips to find a suitable current level for reconfiguring their write current, which is time consuming. In this paper, we propose an efficient operating-current search method and the corresponding built-in circuit for toggle MRAM, which can rapidly find the minimal operating current. With the built-in search circuit, an MRAM chip can dynamically configure its write current through few tester channels. The resulting chip works correctly and consumes lower power. Production yield, thus, can be increased while the test cost is greatly reduced. We also present a generator of the circuit, which determines the circuit parameters according to the memory specifications and user requirements, and automatically generates the corresponding modules.
Keywords
MRAM devices; built-in self test; MRAM cell operating condition; MRAM chips; MRAM yield improvement; built-in circuit; built-in search circuit; circuit parameters; deep-submicrometer process technology; magnetic random access memory; memory designers; memory specifications; nonvolatile memory; production yield; self-configuration scheme; tester channels; toggle MRAM; unlimited endurance; write current; write failures; Computer architecture; Magnetic tunneling; Microprocessors; Power demand; Random access memory; Search methods; Spirals; Built-in self-test (BIST); characterization; magnetic random access memory (MRAM); memory testing; yield enhancement;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2012.2207136
Filename
6255805
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