DocumentCode :
2854447
Title :
SiP testing strategy for automobile LSI
Author :
Aoki, H.
Author_Institution :
Renesas Technol. Corp., Tokyo
fYear :
2007
fDate :
21-26 Oct. 2007
Firstpage :
1
Lastpage :
1
Abstract :
Recently LSI for automobile is requested SiP or bare chip assembly. It is necessary for it to reduce the substrate size and to increase electrical performance. But current technology is satisfied with their request technically, but it is not reasonable in production cost. So I mention about Wafer level burn-in and Wafer level AC testing, which is necessary proceeding in the near future.
Keywords :
automotive electronics; integrated circuit testing; large scale integration; system-in-package; SiP testing; automobile LSI; bare chip assembly; substrate size reduction; wafer level AC testing; wafer level burn-in;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location :
Santa Clara, CA
ISSN :
1089-3539
Print_ISBN :
978-1-4244-1127-6
Type :
conf
DOI :
10.1109/TEST.2007.4437695
Filename :
4437695
Link To Document :
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