DocumentCode :
2854482
Title :
Merged transistor logic--A low-cost bipolar logic concept
Author :
Berger, H. ; Wiedman, S.
Author_Institution :
IBM Labs., Boeblingen, W. Germany
Volume :
XV
fYear :
1972
fDate :
16-18 Feb. 1972
Firstpage :
90
Lastpage :
91
Abstract :
A bipolar logic concept allowing high functional densities comparable with advanced FET logic due to omission of isolation diffusion and ohmic resistors (four mask steps only) will be described. Despite process simplicity a power-x delay product of 0.7 pJ has been experimentally verified.
Keywords :
Delay; Electron devices; Isolation technology; Laboratories; Logic circuits; Logic devices; Power generation economics; Resistors; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1972 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1972.1155121
Filename :
1155121
Link To Document :
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