• DocumentCode
    285469
  • Title

    A superfast algorithm for single-error correction in RRNS and hardware implementation

  • Author

    Sun, J.-D. ; Krishna, H. ; Lin, K.-Y.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA
  • Volume
    2
  • fYear
    1992
  • fDate
    10-13 May 1992
  • Firstpage
    795
  • Abstract
    A superfast algorithm for correcting single residue errors in the RRNS (redundant residue number system) is developed with a slight increase in redundancy. Based on this algorithm and another recently proposed fast algorithm, two architectures are designed for their hardware implementation. The hardware complexity for this superfast algorithm is O(k) while the hardware complexity for previously known algorithm is O(k2)
  • Keywords
    digital arithmetic; encoding; error correction; redundancy; RRNS; architectures; hardware complexity; hardware implementation; redundant RNS; redundant residue number system; single-error correction; superfast algorithm; Algorithm design and analysis; Computational complexity; Computer architecture; Computer errors; Decoding; Delay; Error correction; Hardware; Redundancy; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-0593-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1992.230102
  • Filename
    230102
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=285469