DocumentCode
285477
Title
An S/H interpolator for oversampling D/A converters
Author
Wu, Chung-Yu ; Shieu, Yie-Yuan ; Yu, Tsai-Chung
Author_Institution
Nat. Chiao Tung Univ., Hsin-Chu, Taiwan
Volume
2
fYear
1992
fDate
10-13 May 1992
Firstpage
613
Abstract
A novel S/H interpolator for oversampling converters is proposed where the filter coefficients are linearly combined to form the symmetric terms. It is verified that the hardware implementation is efficient due to the decreased multiplier rate and compact digital circuits. These lead to a decrease of the coupled noise, so that the performance of the analog front-end circuits in oversampling D/A (digital-to-analog) converters is not degraded. The multiplier rate is only half of that in the polyphase structure, and the number of the delay elements remains the same. Due to the lower multiplier rate, smaller chip size, and smaller transient noise, the proposed new interpolation FIR (finite impulse response) filter is more suitable in the applications of dual-channel audio-band D/A converters
Keywords
digital-analogue conversion; interpolation; sample and hold circuits; DAC; S/H interpolator; analog front-end circuits; compact digital circuits; dual channel audio-band convertor; filter coefficients; finite impulse response; hardware implementation; interpolation; multiplier rate; oversampling D/A converters; Circuit noise; Coupling circuits; Degradation; Digital circuits; Finite impulse response filter; Frequency; Interpolation; Noise shaping; Quantization; Signal resolution;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0593-0
Type
conf
DOI
10.1109/ISCAS.1992.230117
Filename
230117
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