Clocked CMOS calculator circuitry

Author

Suzuki, Yuya ; Hirasawa, M. ; Odagawa, K.

Author_Institution

Tokyo Shibaura Electric Co., Ltd., Kawasaki, Japan

Volume

XVI

fYear

1973

fDate

14-16 Feb. 1973

Firstpage

Lastpage

Abstract

A 5-mm square desk calculator LSI using CMOS technology has been developed. The chip uses only 3300 components through the use of a clocked circuit.

Keywords

CMOS logic circuits; CMOS process; Capacitance; Capacitors; Clocks; Pulse circuits; Pulse inverters; Shift registers; Voltage; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference. Digest of Technical Papers. 1973 IEEE International

Conference_Location

Philadelphia, PA, USA

Type

DOI

10.1109/ISSCC.1973.1155149

Filename

1155149

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