DocumentCode :
2854973
Title :
Design of Schottky-barrier diode-clamped transistor layouts
Author :
Hodges, D. ; Heald, R.
Author_Institution :
University of California, Berkeley, CA, USA
Volume :
XVI
fYear :
1973
fDate :
14-16 Feb. 1973
Firstpage :
106
Lastpage :
107
Abstract :
A circuit analysis of three-dimensional distributed parameters of integrated devices will be offered, based on the use of a grid of lumped elements. Internal saturation, current crowding and high-level effects can be readily predicted, in agreement with measurements.
Keywords :
Circuit analysis computing; Circuit simulation; Contracts; Distributed computing; Schottky barriers; Schottky diodes; Surface resistance; Temperature distribution; Transistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1973 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1973.1155153
Filename :
1155153
Link To Document :
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